Very Long Instruction Word (VLIW)

Very Long Instruction Word (VLIW)

Very long instruction word (VLIW) describes a computer processing architecture in which a language compiler or pre-processor breaks program instruction down into basic operations that can be performed by the processor in parallel. Or Very long instruction word (VLIW) is an instruction set architecture designed to take full advantage of instruction-level parallelism (ILP) for improved performance. Central processing units (CPU, processor) allow programs to specify instructions to execute in sequence only whereas a VLIW processor allows programs to explicitly specify instructions to execute in parallel. This design is intended to allow higher performance without the complexity inherent in some other designs.

VLIW is sometimes viewed as the next step beyond the reduced instruction set computing ( RISC ) architecture, which also works with a limited set of relatively basic instructions and can usually execute more than one instruction at a time. The main advantage of VLIW processors is that complexity is moved from the hardware to the software, which means that the hardware can be smaller, cheaper, and require less power to operate. The challenge is to design a compiler or pre-processor that is intelligent enough to decide how to build the very long instruction words. If dynamic pre-processing is done as the program is run, performance may be a concern.

Features:

  • The processors in this architecture have multiple functional units, fetch from the Instruction cache that have the Very Long Instruction Word.
  • Multiple independent operations are grouped together in a single VLIW Instruction. They are initialized in the same clock cycle.
  • Each operation is assigned an independent functional unit.
  • All the functional units share a common register file.
  • Instruction words are typically of the length 64-1024 bits depending on the number of execution unit and the code length required to control each unit.
  • Instruction scheduling and parallel dispatch of the word is done statically by the compiler.
  • The compiler checks for dependencies before scheduling parallel execution of the instructions.

Why use VLIW?

The key to higher performance in microprocessors for a broad range of applications is the ability to exploit fine-grain, instruction-level parallelism. Some methods for exploiting fine-grain parallelism include:

  • pipelining
  • multiple processors
  • superscalar implementation
  • specifying multiple independent operations per instruction

Architecture Comparison: CISC, RISC, AND VLIW

From the larger perspective, RISC, CISC, and VLIW architectures have more similarities than differences. The differences that exist, however, have profound effects on the implementations of these architectures. Obviously these architectures all use the traditional state-machine model of computation: Each instruction effects an incremental change in the state (memory, registers) of the computer, and the hardware fetches and executes instructions sequentially until a branch instruction causes the flow of control to change. The differences between RISC, CISC, and VLIW are in the formats and semantics of the instructions. Table 1 compares architecture characteristics. CISC instructions vary in size, often specify a sequence of operations, and can require serial (slow) decoding algorithms.



Advantages

  • Performance similar to CISC and RISC
  • Reduced hardware complexity over a superscalar implementation
  • Reduces power consumption because of the reduction of hardware complexity.
  • Increases potential clock rate.
  • Uses instruction-level parallelism to the fullest
  • VLIW is a simpler way to build a superscalar microprocessor

Disadvantages :

  • Complex compilers are required which are hard to design.
  • Increased program code size.
  • Larger memory bandwidth and register-file bandwidth.
  • Unscheduled events.
  • In the case of un-filled opcodes in a VLIW, there is waste of memory space and instruction bandwidth.

Commercial Use

  • VLIW is used extensively in the embedded chip market
  • Intel implemented VLIW in the Intel i860, their first 64-bit microprocessor
  • Commercial VLIW CPUs include:
    • TriMedia media processors 
    • Super Harvard Architecture Single-Chip Computer (SHARC) DSP 
    • C6000 digital signal processor (DSP) family 
  • Intel's Itanium IA-64 explicitly parallel instruction computing (EPIC) and Elbrus 2000 a are widely used VLIW CPU architectures

Reference:-

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