M.Tech. 1st sem CMOS VLSI Design Upcoming topics
Unit-1 VLSI design methodologies: VLSI Design flow, Design Hierarchy, Regularity, Modularity and Locality, VLSI design styles, Design quality, Packaging technology MOS device design equations, Second order effects, the complementary CMOS Inverter DC characteristics. Unit-II Circuit Characterization and Performance Estimation: Parasitic effect in Integrated Circuits, Resistance estimation, capacitance estimation, Inductance. Switching characteristics, CMOS Gate transistor sizing, Power dissipation, CMOS Logic Structures, Clocking Strategies. Unit-III CMOS Process Enhancement and Layout Considerations: Interconnect, circuit elements, stick diagram, Layout design rules, Latch up, latch up triggering, latch up prevention, Technology related CAD issues. Unit-IV Subsystem Design: Structured design of combinational logie- parity generator, multiplexer, code converters. Clocked sequential circuits- two phase clocking, charge storage, dynamic register element, and dynamic shift register. Subsys...